Make several formatting/stylistic changes

- Use cleaner 'booktabs' table style
- Stop using monospace for addressing mode initialisms
- Increase spacing in encoding figures and operations table
- Annotate preamble statements a little
- Make section headings sans-serif
- Enable internationalization (for date format)
- Create custom title format
- Set fonts to baskervald, courier 10 pitch and helvetica
This commit is contained in:
Camden Dixie O'Brien 2023-10-05 13:28:27 +01:00
parent d27b5bb1a5
commit 6463d51a5f

122
spec.tex
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@ -1,22 +1,57 @@
\documentclass[a4paper]{article} \documentclass[a4paper]{article}
\usepackage{array} \usepackage{array}
\usepackage{baskervald}
\usepackage[british]{babel}
\usepackage{booktabs}
\usepackage{courierten}
\usepackage{graphicx} \usepackage{graphicx}
\usepackage[utf8]{inputenc} \usepackage[utf8]{inputenc}
\usepackage{multirow} \usepackage{multirow}
\usepackage{nameref} \usepackage{nameref}
\usepackage{parskip} \usepackage{parskip}
\usepackage{sectsty}
\usepackage{tabularx} \usepackage{tabularx}
\usepackage{helvet}
\newcolumntype{B}{>{\centering\tiny\bfseries\arraybackslash}X} % Custom title format
\newcommand{\noopcode}{\multicolumn{1}{c|}{--}} \renewcommand{\title}[1]{\def\thetitle{#1}}
\renewcommand{\author}[1]{\def\theauthor{#1}}
\renewcommand{\date}[1]{\def\thedate{#1}}
\newcommand{\version}[1]{\def\theversion{#1}}
\newcommand{\versiondatesep}{\hskip 0.5em \textperiodcentered \hskip 0.5em}
\renewcommand{\maketitle}{
\null
\vskip 3em
\begin{center}
{\LARGE\sffamily\bfseries \thetitle}
\par
{\large \theauthor}
\par
\vskip 0.5em
{\itshape \theversion \versiondatesep \thedate}
\end{center}
\par
\vskip 4em
}
% Make all section headings sans-serif
\allsectionsfont{\sffamily}
% Commands for operations table
\newcommand{\noopcode}{--}
\newcommand{\op}[1]{\texttt{#1}} \newcommand{\op}[1]{\texttt{#1}}
\newcommand{\opsep}{\cline{2-8} \multicolumn{1}{|c|}{}} \newcommand{\opsep}{\multicolumn{1}{c}{}}
\newcommand{\opfamily}[2]{ \newcommand{\opfamily}[2]{
\hline\multicolumn{1}{|c|}{\multirow{#1}{*}{\rotatebox{90}{\textbf{#2}}}}} \midrule\multicolumn{1}{c}{\multirow{#1}{*}{\rotatebox{90}{\textbf{#2}}}}}
% Column type for bit-layout figures
\newcolumntype{B}{>{\centering\tiny\bfseries\arraybackslash}X}
\title{ETD32 ISA Specification} \title{ETD32 ISA Specification}
\author{Camden Dixie O'Brien} \author{Camden Dixie O'Brien}
\version{Version 0.1.0-draft}
\date{\today}
\begin{document} \begin{document}
@ -30,19 +65,16 @@ processor internals and design.
\begin{table}[h] \begin{table}[h]
\centering \centering
\begin{tabularx}{\textwidth}{|l|r|X|} \begin{tabular}{lrl}
\hline \toprule
\textbf{Name} & \textbf{Number} & \textbf{Purpose} \\ \textbf{Name} & \textbf{Number} & \textbf{Purpose} \\
\hline \midrule
Z & 0 & ``Black hole'' pseudo-register \\ Z & 0 & ``Black hole'' pseudo-register \\
\hline
R1--R29 & 1--29 & General purpose \\ R1--R29 & 1--29 & General purpose \\
\hline
SP & 30 & Stack pointer \\ SP & 30 & Stack pointer \\
\hline
PC & 31 & Program counter \\ PC & 31 & Program counter \\
\hline \bottomrule
\end{tabularx} \end{tabular}
\caption{List of Registers} \caption{List of Registers}
\end{table} \end{table}
@ -55,7 +87,7 @@ section \ref{sec:conditional-execution} for more details.
\section{Addressing Modes} \section{Addressing Modes}
\subsection{Register Direct (\texttt{RD})} \subsection{Register Direct (RD)}
\begin{center} \begin{center}
\texttt{Op R\textsubscript{dest},R\textsubscript{src1},R\textsubscript{src2}} \texttt{Op R\textsubscript{dest},R\textsubscript{src1},R\textsubscript{src2}}
@ -65,7 +97,7 @@ In register direct mode, the operands consist of up to three register
numbers. The first register is always a destination; if the second and numbers. The first register is always a destination; if the second and
third are present they are used as sources. third are present they are used as sources.
\subsection{Register-Immediate (\texttt{RI})} \subsection{Register-Immediate (RI)}
\begin{center} \begin{center}
\texttt{Op R\textsubscript{dest},R\textsubscript{src},\#I} \texttt{Op R\textsubscript{dest},R\textsubscript{src},\#I}
@ -75,7 +107,7 @@ Register-immediate instructions have a destination register and a
single source register, with the rest of the instruction being a single source register, with the rest of the instruction being a
signed, 12-bit immediate value. signed, 12-bit immediate value.
\subsection{Base-Offset (\texttt{BO})} \subsection{Base-Offset (BO)}
\begin{center} \begin{center}
\texttt{ \texttt{
@ -87,7 +119,7 @@ input or output depending on the operation, a base register and a
12-bit immediate value (the offset). The offset is added to the value 12-bit immediate value (the offset). The offset is added to the value
of the base register, and this is used as a memory address. of the base register, and this is used as a memory address.
\subsection{Base-Index (\texttt{BI})} \subsection{Base-Index (BI)}
\begin{center} \begin{center}
\texttt{ \texttt{
@ -99,14 +131,14 @@ index register is provided instead of an offset immediate. The values
of the base and index registers are added together and used as a of the base and index registers are added together and used as a
memory address. memory address.
\subsection{Immediate-Only (\texttt{I})} \subsection{Immediate (I)}
\begin{center} \begin{center}
\texttt{Op \#I} \texttt{Op \#I}
\end{center} \end{center}
The simplest addressing mode; immediate-only instructions specify a The simplest addressing mode; immediate instructions specify a single,
single, signed, 22-bit immediate value. signed, 22-bit immediate value.
\section{Conditional Execution} \section{Conditional Execution}
\label{sec:conditional-execution} \label{sec:conditional-execution}
@ -117,19 +149,16 @@ by an operation are implicitly cleared.
\begin{table}[h] \begin{table}[h]
\centering \centering
\begin{tabularx}{\textwidth}{|c|X|} \begin{tabular}{rl}
\hline \toprule
\textbf{Flag} & \textbf{Description} \\ \textbf{Flag} & \textbf{Description} \\
\hline \midrule
C & Carry / overflow \\ C & Carry / overflow \\
\hline
N & Less than zero \\ N & Less than zero \\
\hline
Z & Equal to zero \\ Z & Equal to zero \\
\hline
P & Greater than zero \\ P & Greater than zero \\
\hline \bottomrule
\end{tabularx} \end{tabular}
\caption{Condition flags} \caption{Condition flags}
\label{tab:condition-flags} \label{tab:condition-flags}
\end{table} \end{table}
@ -148,22 +177,21 @@ zero.
There are a total of 18 distinct operations, with 33 opcodes (each There are a total of 18 distinct operations, with 33 opcodes (each
addressing mode variant of a command has its own opcode). They fall addressing mode variant of a command has its own opcode). They fall
into three categories: \textbf{Logic \& Arithmetic}, \textbf{Memory} into three categories: \textbf{Logic \& Arithmetic}, \textbf{Memory}
and \textbf{Flow Control}. and \textbf{Flow Control}. Refer to table \ref{tab:operations} for an
exhaustive list of these operations and their opcodes.
Refer to table \ref{tab:operations} for an exhaustive list of these
operations and their opcodes.
\begin{table}[p] \begin{table}[p]
\begin{tabularx}{\textwidth}{cl|*{5}{r|}X|} \renewcommand{\arraystretch}{1.2}
\cline{3-8} \begin{tabularx}{\textwidth}{cl*{5}{r}X}
& & \toprule
\multicolumn{5}{c|}{\textbf{Opcode}} & \multicolumn{2}{c}{\multirow{2}{*}{\textbf{Op}}} &
\multicolumn{5}{c}{\textbf{Opcode}} &
\multirow{2}{*}{\textbf{Description}} \\ \multirow{2}{*}{\textbf{Description}} \\
\cline{3-7} \cmidrule(r){3-7}
& &
& \multicolumn{1}{c|}{\texttt{RD}} & \multicolumn{1}{c|}{\texttt{RI}} & \multicolumn{1}{c}{RD} & \multicolumn{1}{c}{RI}
& \multicolumn{1}{c|}{\texttt{BO}} & \multicolumn{1}{c|}{\texttt{BI}} & \multicolumn{1}{c}{BO} & \multicolumn{1}{c}{BI}
& \multicolumn{1}{c|}{\texttt{I}} & \\ & \multicolumn{1}{c}{I} & \\
\opfamily{14}{Logic \& Arithmetic} & \opfamily{14}{Logic \& Arithmetic} &
\op{LLS} & 0 & 1 & \noopcode & \noopcode & \noopcode & \op{LLS} & 0 & 1 & \noopcode & \noopcode & \noopcode &
@ -238,9 +266,9 @@ operations and their opcodes.
\opsep & \opsep &
\op{TI} & \noopcode & \noopcode & \noopcode & \noopcode & 32 & \op{TI} & \noopcode & \noopcode & \noopcode & \noopcode & 32 &
Trigger a software interrupt; the argument is ignored \\ Trigger a software interrupt; the argument is ignored \\
\hline \bottomrule
\end{tabularx} \end{tabularx}
\caption{List of Operations} \caption{Operations and their Opcodes}
\label{tab:operations} \label{tab:operations}
\end{table} \end{table}
@ -255,6 +283,7 @@ immediate values have a sign bit in the most significant position (1
indicating negative). indicating negative).
\begin{figure}[h] \begin{figure}[h]
\renewcommand{\arraystretch}{1.2}
\centering \centering
\begin{tabularx}{\textwidth}{|*{32}{@{}B@{}|}} \begin{tabularx}{\textwidth}{|*{32}{@{}B@{}|}}
\hline \hline
@ -272,36 +301,37 @@ indicating negative).
\end{figure} \end{figure}
\begin{figure}[h] \begin{figure}[h]
\renewcommand{\arraystretch}{1.2}
\centering \centering
\begin{tabularx}{\textwidth}{c|*{23}{@{}B@{}|}} \begin{tabularx}{\textwidth}{c|*{23}{@{}B@{}|}}
\cline{2-23} \cline{2-23}
& 21 & 20 & 19 & 18 & 17 & 16 & 15 & 14 & 13 & 12 & 11 & 10 & 9 & & 21 & 20 & 19 & 18 & 17 & 16 & 15 & 14 & 13 & 12 & 11 & 10 & 9 &
8 & 7 & 6 & 5 & 4 & 3 & 2 & 1 & 0 \\ 8 & 7 & 6 & 5 & 4 & 3 & 2 & 1 & 0 \\
\hline \hline
\multicolumn{1}{|c|}{\texttt{RD}} & \multicolumn{1}{|r|}{RD} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{dest}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{dest}}} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{src1}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{src1}}} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{src2}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{src2}}} &
\multicolumn{7}{l|}{\textit{Unused}} \\ \multicolumn{7}{l|}{\textit{Unused}} \\
\hline \hline
\multicolumn{1}{|c|}{\texttt{RI}} & \multicolumn{1}{|r|}{RI} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{dest}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{dest}}} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{src}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{src}}} &
\multicolumn{12}{l|}{Signed 12-bit immediate} \\ \multicolumn{12}{l|}{Signed 12-bit immediate} \\
\hline \hline
\multicolumn{1}{|c|}{\texttt{BO}} & \multicolumn{1}{|r|}{BO} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{target}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{target}}} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{base}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{base}}} &
\multicolumn{12}{l|}{ \multicolumn{12}{l|}{
\texttt{I\textsubscript{offset}} (Unsigned 12-bit immediate)} \\ \texttt{I\textsubscript{offset}} (Unsigned 12-bit immediate)} \\
\hline \hline
\multicolumn{1}{|c|}{\texttt{BI}} & \multicolumn{1}{|r|}{BI} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{target}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{target}}} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{base}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{base}}} &
\multicolumn{5}{l|}{\texttt{R\textsubscript{index}}} & \multicolumn{5}{l|}{\texttt{R\textsubscript{index}}} &
\multicolumn{7}{l|}{\textit{Unused}} \\ \multicolumn{7}{l|}{\textit{Unused}} \\
\hline \hline
\multicolumn{1}{|c|}{\texttt{I}} & \multicolumn{1}{|r|}{I} &
\multicolumn{22}{l|}{Signed 22-bit immediate} \\ \multicolumn{22}{l|}{Signed 22-bit immediate} \\
\hline \hline
\end{tabularx} \end{tabularx}