Use multicols instead of twocolumn and adjust margins
This commit is contained in:
parent
22d14797eb
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b1d6ad2ace
262
main.tex
262
main.tex
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\documentclass[a4paper,twocolumn]{article}
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\documentclass[a4paper]{article}
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\usepackage{booktabs}
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\usepackage{booktabs}
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\usepackage{baskervald}
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\usepackage{baskervald}
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\usepackage{courierten}
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\usepackage{courierten}
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\usepackage{cuted}
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\usepackage{cuted}
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\usepackage[hmargin=2.5cm,vmargin=3.5cm]{geometry}
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\usepackage{helvet}
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\usepackage{helvet}
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\usepackage{mathtools}
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\usepackage{mathtools}
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\usepackage{multicol}
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\usepackage{sectsty}
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\usepackage{sectsty}
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\usepackage{tabularx}
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\usepackage{tabularx}
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\begin{document}
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\begin{document}
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\begin{strip}
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\begin{center}
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\centering \LARGE \bfseries AMD64 Cheatsheet
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\LARGE \bfseries AMD64 Cheatsheet
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\vspace{1em}
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\vspace{1em}
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\end{strip}
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\newlength{\colwidth}
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\setlength{\colwidth}{\linewidth}
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\addtolength{\colwidth}{-0.5\columnsep}
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\section{Instructions}
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\noindent\begin{tabularx}{\colwidth}{>{\ttfamily}l>{\ttfamily}l>{$}X<{$}}
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\toprule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Arithmetic \& Logic} \\
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\midrule
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add & S,D & D \leftarrow S + D \\
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sub & S,D & D \leftarrow D - S \\
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neg & D & D \leftarrow -D \\
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inc & D & D \leftarrow D + 1 \\
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dec & D & D \leftarrow D - 1 \\
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imul & S,D & D \leftarrow S \times D \\
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idiv & S & \mathtt{rax} \leftarrow \lfloor\mathtt{rdx}:\mathtt{rax} \div S\rfloor \\
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& & \mathtt{rdx} \leftarrow (\mathtt{rdx}:\mathtt{rax})\mod{S} \\
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and & S,D & D \leftarrow S \mathbin{\&} D \\
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or & S,D & D \leftarrow S \mathbin{|} D \\
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xor & S,D & D \leftarrow S \wedge D \\
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not & D & D \leftarrow \mathord{\sim} D \\
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sal & n,D & D \leftarrow D \ll n \\
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shr & n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(logical)} \\
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sar & n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(arithmetic)} \\
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\midrule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Data transfer} \\
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\midrule
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lea & S,D & D \leftarrow \mathrm{addressof}(S) \\
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mov & S,D & D \leftarrow S \\
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\midrule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Conditionals \& Branches} \\
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\midrule
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cmp & A,B & B - A \hspace{1em} \textrm{(setting cond. flags)} \\
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test & A,B & A \mathbin{\&} B \hspace{1em} \textrm{(setting cond. flags)} \\
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jmp & l & \textrm{jump to \texttt{l} unconditionally} \\
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je & l & \textrm{jump to \texttt{l} if equal} \\
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jne & l & \textrm{jump to \texttt{l} if not equal} \\
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js & l & \textrm{jump to \texttt{l} if negative} \\
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jns & l & \textrm{jump to \texttt{l} if non-negative} \\
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jg & l & \textrm{jump to \texttt{l} if greater} \\
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jge & l & \textrm{jump to \texttt{l} if greater or equal} \\
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jl & l & \textrm{jump to \texttt{l} if lesser} \\
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jle & l & \textrm{jump to \texttt{l} if lesser or equal} \\
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ja & l & \textrm{jump to \texttt{l} if above} \\
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jae & l & \textrm{jump to \texttt{l} if above or equal} \\
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jb & l & \textrm{jump to \texttt{l} if below} \\
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jbe & l & \textrm{jump to \texttt{l} if below or equal} \\
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\midrule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Stack operations} \\
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\midrule
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push & S & \mathtt{rsp} \leftarrow \mathtt{rsp} - \mathrm{sizeof}(S) \\
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& & \mathrm{at}(\mathtt{rsp}) \leftarrow S \\
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pop & D & D \leftarrow \mathrm{at}(\mathtt{rsp}) \\
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& & \mathtt{rsp} \leftarrow \mathtt{rsp} + \mathrm{sizeof}(S) \\
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callq & l & \textrm{push \texttt{rip} then jump to \texttt{l}} \\
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retq & & \textrm{pop to \texttt{rip}} \\
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\bottomrule
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\end{tabularx}
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\noindent\begin{tabularx}{\colwidth}{lX}
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\toprule
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\multicolumn{2}{>{\sffamily\bfseries}c}{Addressing Modes} \\
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\midrule
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Immediate & \texttt{\$C} \\
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Register & \texttt{\%R} \\
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Memory & \texttt{[C\textsubscript{d}](\%R\textsubscript{b}[,\%R\textsubscript{i}[,C\textsubscript{s}])} \\
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\bottomrule
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\end{tabularx}
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\[\textrm{Memory Address} = C_d + R_b + C_sR_i\]
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\noindent\begin{center}
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\begin{tabular}{cl}
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\toprule
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\multicolumn{2}{>{\sffamily\bfseries}c}{Suffixes} \\
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\midrule
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b & 8 bits \\
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w & 16 bits \\
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l & 32 bits \\
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q & 64 bits \\
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\bottomrule
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\end{tabular}
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\hspace{1em}
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\begin{tabular}{cl}
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\toprule
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\multicolumn{2}{>{\sffamily\bfseries}c}{Condition Flags} \\
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\midrule
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ZF & Zero \\
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SF & Sign (set on negative) \\
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CF & Carry \\
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OF & Overflow \\
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\bottomrule
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\end{tabular}
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\end{center}
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\end{center}
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\section{Registers}
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\begin{multicols}{2}
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\begin{tabularx}{\colwidth}{>{\ttfamily}c>{\ttfamily}c>{\ttfamily}c>{\ttfamily}cX}
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\newlength{\colwidth}
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\toprule
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\setlength{\colwidth}{\linewidth}
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\multicolumn{5}{>{\sffamily\bfseries}c}{Standard} \\
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\addtolength{\colwidth}{-0.5\columnsep}
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\midrule
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rax & eax & ax & al & Accumulator \\
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\section{Instructions}
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rbx & ebx & bx & bl & DS data pointer \\
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rcx & ecx & cx & cl & Counter \\
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\noindent\begin{tabularx}{\colwidth}{>{\ttfamily}l>{\ttfamily}l>{$}X<{$}}
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rdx & edx & dx & dl & I/O pointer \\
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\toprule
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rsi & esi & si & sil & Source pointer \\
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\multicolumn{3}{>{\sffamily\bfseries}c}{Arithmetic \& Logic} \\
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rdi & edi & di & dil & Dest. pointer \\
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\midrule
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\midrule
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add & S,D & D \leftarrow S + D \\
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\multicolumn{5}{>{\sffamily\bfseries}c}{Stack} \\
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sub & S,D & D \leftarrow D - S \\
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\midrule
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neg & D & D \leftarrow -D \\
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rsp & esp & sp & spl & Stack pointer \\
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inc & D & D \leftarrow D + 1 \\
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rbp & ebp & bp & bpl & Base pointer \\
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dec & D & D \leftarrow D - 1 \\
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\midrule
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imul & S,D & D \leftarrow S \times D \\
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\multicolumn{5}{>{\sffamily\bfseries}c}{64-bit Mode Only} \\
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idiv & S & \mathtt{rax} \leftarrow \lfloor\mathtt{rdx}:\mathtt{rax} \div S\rfloor \\
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\midrule
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& & \mathtt{rdx} \leftarrow (\mathtt{rdx}:\mathtt{rax})\mod{S} \\
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r8 & r8d & r8w & r8b & No special use \\
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and & S,D & D \leftarrow S \mathbin{\&} D \\
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r9 & r9d & r9w & r9b & \\
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or & S,D & D \leftarrow S \mathbin{|} D \\
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r10 & r10d & r10w & r10b & \\
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xor & S,D & D \leftarrow S \wedge D \\
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r11 & r11d & r11w & r11b & \\
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not & D & D \leftarrow \mathord{\sim} D \\
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r12 & r12d & r12w & r12b & \\
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sal & n,D & D \leftarrow D \ll n \\
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r13 & r13d & r13w & r13b & \\
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shr & n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(logical)} \\
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r14 & r14d & r14w & r14b & \\
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sar & n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(arithmetic)} \\
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r15 & r15d & r15w & r15b & \\
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\midrule
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\bottomrule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Data transfer} \\
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\end{tabularx}
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\midrule
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lea & S,D & D \leftarrow \mathrm{addressof}(S) \\
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mov & S,D & D \leftarrow S \\
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\midrule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Conditionals \& Branches} \\
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\midrule
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cmp & A,B & B - A \hspace{1em} \textrm{(setting cond. flags)} \\
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test & A,B & A \mathbin{\&} B \hspace{1em} \textrm{(setting cond. flags)} \\
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jmp & l & \textrm{jump to \texttt{l} unconditionally} \\
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je & l & \textrm{jump to \texttt{l} if equal} \\
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jne & l & \textrm{jump to \texttt{l} if not equal} \\
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js & l & \textrm{jump to \texttt{l} if negative} \\
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jns & l & \textrm{jump to \texttt{l} if non-negative} \\
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jg & l & \textrm{jump to \texttt{l} if greater} \\
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jge & l & \textrm{jump to \texttt{l} if greater or equal} \\
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jl & l & \textrm{jump to \texttt{l} if lesser} \\
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jle & l & \textrm{jump to \texttt{l} if lesser or equal} \\
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ja & l & \textrm{jump to \texttt{l} if above} \\
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jae & l & \textrm{jump to \texttt{l} if above or equal} \\
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jb & l & \textrm{jump to \texttt{l} if below} \\
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jbe & l & \textrm{jump to \texttt{l} if below or equal} \\
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\midrule
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\multicolumn{3}{>{\sffamily\bfseries}c}{Stack operations} \\
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\midrule
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push & S & \mathtt{rsp} \leftarrow \mathtt{rsp} - \mathrm{sizeof}(S) \\
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& & \mathrm{at}(\mathtt{rsp}) \leftarrow S \\
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pop & D & D \leftarrow \mathrm{at}(\mathtt{rsp}) \\
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& & \mathtt{rsp} \leftarrow \mathtt{rsp} + \mathrm{sizeof}(S) \\
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callq & l & \textrm{push \texttt{rip} then jump to \texttt{l}} \\
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retq & & \textrm{pop to \texttt{rip}} \\
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\bottomrule
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\end{tabularx}
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\noindent\begin{tabularx}{\colwidth}{lX}
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\toprule
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\multicolumn{2}{>{\sffamily\bfseries}c}{Addressing Modes} \\
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\midrule
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Immediate & \texttt{\$C} \\
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Register & \texttt{\%R} \\
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Memory & \texttt{[C\textsubscript{d}](\%R\textsubscript{b}[,\%R\textsubscript{i}[,C\textsubscript{s}])} \\
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\bottomrule
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\end{tabularx}
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\[\textrm{Memory Address} = C_d + R_b + C_sR_i\]
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\noindent\begin{center}
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\begin{tabular}{cl}
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\toprule
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\multicolumn{2}{>{\sffamily\bfseries}c}{Suffixes} \\
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\midrule
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b & 8 bits \\
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w & 16 bits \\
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l & 32 bits \\
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q & 64 bits \\
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\bottomrule
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\end{tabular}
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\hspace{1em}
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\begin{tabular}{cl}
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\toprule
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\multicolumn{2}{>{\sffamily\bfseries}c}{Condition Flags} \\
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\midrule
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ZF & Zero \\
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SF & Sign (set on negative) \\
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CF & Carry \\
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OF & Overflow \\
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\bottomrule
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\end{tabular}
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\end{center}
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\section{Registers}
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\begin{tabularx}{\colwidth}{>{\ttfamily}c>{\ttfamily}c>{\ttfamily}c>{\ttfamily}cX}
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\toprule
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\multicolumn{5}{>{\sffamily\bfseries}c}{Standard} \\
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\midrule
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rax & eax & ax & al & Accumulator \\
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rbx & ebx & bx & bl & DS data pointer \\
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rcx & ecx & cx & cl & Counter \\
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rdx & edx & dx & dl & I/O pointer \\
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rsi & esi & si & sil & Source pointer \\
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rdi & edi & di & dil & Dest. pointer \\
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\midrule
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\multicolumn{5}{>{\sffamily\bfseries}c}{Stack} \\
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\midrule
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rsp & esp & sp & spl & Stack pointer \\
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rbp & ebp & bp & bpl & Base pointer \\
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\midrule
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\multicolumn{5}{>{\sffamily\bfseries}c}{64-bit Mode Only} \\
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\midrule
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r8 & r8d & r8w & r8b & No special use \\
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r9 & r9d & r9w & r9b & \\
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r10 & r10d & r10w & r10b & \\
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r11 & r11d & r11w & r11b & \\
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r12 & r12d & r12w & r12b & \\
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r13 & r13d & r13w & r13b & \\
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r14 & r14d & r14w & r14b & \\
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r15 & r15d & r15w & r15b & \\
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\bottomrule
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\end{tabularx}
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\end{multicols}
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\end{document}
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\end{document}
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