README.md

@@ -74,20 +74,21 @@ guile tests.scm | xmllint --format -
 
 | Name   | Address | Size / B | Access       |
 |--------|---------|----------|--------------|
-| TXBUF  | 00h     | 32       | write        |
-| RXBUF  | 20h     | 32       | read         |
-| TXHEAD | 40h     | 4        | atomic read  |
-| TXTAIL | 44h     | 4        | atomic write |
-| RXHEAD | 48h     | 4        | atomic write |
-| RXTAIL | 4Ch     | 4        | atomic read  |
+| TXBUF  | 000h    | 32       | write        |
+| RXBUF  | 080h    | 32       | read         |
+| TXHEAD | 100h    | 4        | atomic read  |
+| TXTAIL | 104h    | 4        | atomic write |
+| RXHEAD | 108h    | 4        | atomic write |
+| RXTAIL | 10Ch    | 4        | atomic read  |
 
 For both sending (`TX`) and receiving (`RX`), there are three
 registers: `xBUF`, `xHEAD` and `xTAIL`:
 
-- `xBUF` registers are 32-byte FIFO ring buffers used for data
+- `xBUF` registers are 128-byte FIFO ring buffers used for data
 - The `xHEAD` and `xTAIL` registers specify the start and end of data
   in the ring buffer, `xHEAD` being the offset of the first byte of
-  data, and `xTAIL` being the offset of the first byte *after* the data.
+  data, and `xTAIL` being the offset of the first byte *after* the
+  data.
 
 In order to be distinguishable from the empty state, the ring buffers
 must never be completely full -- there must always be *at least one*
@@ -97,7 +98,7 @@ unoccupied byte between the tail and the head.
 
 | Name     | Address | Size / B | Access       |
 |----------|---------|----------|--------------|
-| SYSREADY | 50h     | 1        | atomic write |
+| SYSREADY | 110h    | 4        | atomic write |
 
 The `SYSREADY` register is used to indicate when the system has booted
 up and is ready for user input.

emu.js

@@ -1,17 +1,15 @@
-const TXBUF = 0x00;
-const RXBUF = 0x20;
-const TXHEAD = 0x40;
-const TXTAIL = 0x44;
-const RXHEAD = 0x48;
-const RXTAIL = 0x4c;
-const SYSREADY = 0x50;
+const TXBUF = 0x000;
+const RXBUF = 0x080;
+const TXHEAD = 0x100;
+const TXTAIL = 0x104;
+const RXHEAD = 0x108;
+const RXTAIL = 0x10c;
 
-const TXBUF_SIZE = 32;
-const RXBUF_SIZE = 32;
-const PERIPHS_SIZE = 81;
+const SYSREADY = 0x110;
 
 const POLL_INTERVAL_MS = 20;
 const DOT_INTERVAL_MS = 120;
+const PERIPHS_SIZE = 0x200;
 
 const COLS = 80;
 const TAB_WIDTH = 8;
@@ -93,7 +91,7 @@ class Emulator {
 	}
 
 	fifo_next(idx) {
-		return (idx + 1) & 0x1f;
+		return (idx + 1) & 0x7f;
 	}
 
 	handle_tx_data(head, tail) {

prelude.f

@@ -210,13 +210,13 @@ CHAR . EMIT
 
 HEX
 
-00 CONSTANT TXBUF
-20 CONSTANT RXBUF
-40 CONSTANT TXHEAD
-44 CONSTANT TXTAIL
-48 CONSTANT RXHEAD
-4C CONSTANT RXTAIL
-50 CONSTANT SYSREADY
+000 CONSTANT TXBUF
+080 CONSTANT RXBUF
+100 CONSTANT TXHEAD
+104 CONSTANT TXTAIL
+108 CONSTANT RXHEAD
+10C CONSTANT RXTAIL
+110 CONSTANT SYSREADY
 
 DECIMAL
 

wipforth.ws

@@ -2,12 +2,12 @@
 .import main "emu" "mem"
 
 ;; Peripheral registers
-.def TXBUF  00h
-.def RXBUF  20h
-.def TXHEAD 40h
-.def TXTAIL 44h
-.def RXHEAD 48h
-.def RXTAIL 4Ch
+.def TXBUF  000h
+.def RXBUF  080h
+.def TXHEAD 100h
+.def TXTAIL 104h
+.def RXHEAD 108h
+.def RXTAIL 10Ch
 
 .def DICT_START 0200h
 
@@ -752,7 +752,7 @@
     local.get head
     i32.const 1
     i32.add
-    i32.const 1Fh
+    i32.const 7Fh
     i32.and
     i32.atomic.store8 0 0
 
@@ -768,7 +768,7 @@
       local.tee tail
       i32.const 1
       i32.add
-      i32.const 1Fh
+      i32.const 7Fh
       i32.and
       local.tee n
       i32.const TXHEAD