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Increase TX and RX buffer size to 128 bytes

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This commit is contained in:
Camden Dixie O'Brien
2026-03-20 12:45:43 +00:00
parent 67fc1d8d7b
commit fe5c55cabf
4 changed files with 34 additions and 35 deletions
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README.md
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@@ -74,20 +74,21 @@ guile tests.scm | xmllint --format -
| Name | Address | Size / B | Access |
|--------|---------|----------|--------------|
| TXBUF | 00h | 32 | write |
| RXBUF | 20h | 32 | read |
| TXHEAD | 40h | 4 | atomic read |
| TXTAIL | 44h | 4 | atomic write |
| RXHEAD | 48h | 4 | atomic write |
| RXTAIL | 4Ch | 4 | atomic read |
| TXBUF | 000h | 32 | write |
| RXBUF | 080h | 32 | read |
| TXHEAD | 100h | 4 | atomic read |
| TXTAIL | 104h | 4 | atomic write |
| RXHEAD | 108h | 4 | atomic write |
| RXTAIL | 10Ch | 4 | atomic read |
For both sending (`TX`) and receiving (`RX`), there are three
registers: `xBUF`, `xHEAD` and `xTAIL`:
- `xBUF` registers are 32-byte FIFO ring buffers used for data
- `xBUF` registers are 128-byte FIFO ring buffers used for data
- The `xHEAD` and `xTAIL` registers specify the start and end of data
in the ring buffer, `xHEAD` being the offset of the first byte of
data, and `xTAIL` being the offset of the first byte *after* the data.
data, and `xTAIL` being the offset of the first byte *after* the
data.
In order to be distinguishable from the empty state, the ring buffers
must never be completely full -- there must always be *at least one*
@@ -97,7 +98,7 @@ unoccupied byte between the tail and the head.
| Name | Address | Size / B | Access |
|----------|---------|----------|--------------|
| SYSREADY | 50h | 1 | atomic write |
| SYSREADY | 110h | 4 | atomic write |
The `SYSREADY` register is used to indicate when the system has booted
up and is ready for user input.