Rejig serial periph

This commit is contained in:
2026-02-24 15:53:43 +00:00
parent 0608e2c476
commit d11805cd6c
2 changed files with 23 additions and 34 deletions

View File

@@ -30,20 +30,19 @@ these headers.
|--------|--------|----------|--------------|
| TXBUF | 0 | 32 | write |
| RXBUF | 32 | 32 | read |
| TXDATA | 64 | 1 | atomic write |
| TXHEAD | 65 | 1 | atomic read |
| TXTAIL | 66 | 1 | atomic write |
| RXDATA | 67 | 1 | atomic read |
| RXHEAD | 68 | 1 | atomic write |
| RXTAIL | 69 | 1 | atomic read |
| TXHEAD | 64 | 1 | atomic read |
| TXTAIL | 65 | 1 | atomic write |
| RXHEAD | 66 | 1 | atomic write |
| RXTAIL | 67 | 1 | atomic read |
For both sending (`TX`) and receiving (`RX`), there are four
registers: `xBUF`, `xDATA`, `xHEAD` and `xTAIL`:
For both sending (`TX`) and receiving (`RX`), there are three
registers: `xBUF`, `xHEAD` and `xTAIL`:
- `xBUF` registers are 32-byte FIFO ring buffers used for data
- The `xDATA` registers indicate whether data is available (0 for
data, FFh for no data)
- The `xHEAD` and `xTAIL` registers specify the start and end of
data in the FIFO, `xHEAD` being the offset of the first byte of
data, and `xTAIL` being the offset of the first byte after the
data.
- The `xHEAD` and `xTAIL` registers specify the start and end of data
in the ring buffer, `xHEAD` being the offset of the first byte of
data, and `xTAIL` being the offset of the first byte *after* the data.
In order to be distinguishable from the empty state, the ring buffers
must never be completely full -- there must always be *at least one*
unoccupied byte between the tail and the head.