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\begin{document}

\begin{center}
  \LARGE\sffamily\bfseries AMD64 Cheatsheet
  \vspace{1em}
\end{center}

\begin{multicols}{2}

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  \section{Instructions}

  \noindent\begin{tabularx}{\colwidth}{>{\ttfamily}l>{\ttfamily}l>{$}X<{$}}
    \toprule
    \multicolumn{3}{>{\sffamily\bfseries}c}{Arithmetic \& Logic} \\
    \midrule
    add & S,D & D \leftarrow S + D \\
    sub & S,D & D \leftarrow D - S \\
    neg & D & D \leftarrow -D \\
    inc & D & D \leftarrow D + 1 \\
    dec & D & D \leftarrow D - 1 \\
    imul & S,D & D \leftarrow S \times D \\
    idiv & S & \mathtt{rax} \leftarrow \lfloor\mathtt{rdx}:\mathtt{rax} \div S\rfloor \\
    & & \mathtt{rdx} \leftarrow (\mathtt{rdx}:\mathtt{rax})\mod{S} \\
    and & S,D & D \leftarrow S \mathbin{\&} D \\
    or & S,D & D \leftarrow S \mathbin{|} D \\
    xor & S,D & D \leftarrow S \wedge D \\
    not & D & D \leftarrow \mathord{\sim} D \\
    sal & n,D & D \leftarrow D \ll n \\
    shr & n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(logical)} \\
    sar & n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(arithmetic)} \\
    \midrule
    \multicolumn{3}{>{\sffamily\bfseries}c}{Data transfer} \\
    \midrule
    lea & S,D & D \leftarrow \mathrm{addressof}(S) \\
    mov & S,D & D \leftarrow S \\
    \midrule
    \multicolumn{3}{>{\sffamily\bfseries}c}{Conditionals \& Branches} \\
    \midrule
    cmp & A,B & B - A \hspace{1em} \textrm{(setting cond. flags)} \\
    test & A,B & A \mathbin{\&} B \hspace{1em} \textrm{(setting cond. flags)} \\
    jmp & l & \textrm{jump to \texttt{l} unconditionally} \\
    je & l & \textrm{jump to \texttt{l} if equal} \\
    jne & l & \textrm{jump to \texttt{l} if not equal} \\
    js & l & \textrm{jump to \texttt{l} if negative} \\
    jns & l & \textrm{jump to \texttt{l} if non-negative} \\
    jg & l & \textrm{jump to \texttt{l} if greater} \\
    jge & l & \textrm{jump to \texttt{l} if greater or equal} \\
    jl & l & \textrm{jump to \texttt{l} if lesser} \\
    jle & l & \textrm{jump to \texttt{l} if lesser or equal} \\
    ja & l & \textrm{jump to \texttt{l} if above} \\
    jae & l & \textrm{jump to \texttt{l} if above or equal} \\
    jb & l & \textrm{jump to \texttt{l} if below} \\
    jbe & l & \textrm{jump to \texttt{l} if below or equal} \\
    \midrule
    \multicolumn{3}{>{\sffamily\bfseries}c}{Stack operations} \\
    \midrule
    push & S & \mathtt{rsp} \leftarrow \mathtt{rsp} - \mathrm{sizeof}(S) \\
    & & \mathrm{at}(\mathtt{rsp}) \leftarrow S \\
    pop & D & D \leftarrow \mathrm{at}(\mathtt{rsp}) \\
    & & \mathtt{rsp} \leftarrow \mathtt{rsp} + \mathrm{sizeof}(S) \\
    callq & l & \textrm{push \texttt{rip} then jump to \texttt{l}} \\
    retq & & \textrm{pop to \texttt{rip}} \\
    \bottomrule
  \end{tabularx}

  \noindent\begin{tabularx}{\colwidth}{lX}
    \toprule
    \multicolumn{2}{>{\sffamily\bfseries}c}{Addressing Modes} \\
    \midrule
    Immediate & \texttt{\$C} \\
    Register & \texttt{\%R} \\
    Memory & \texttt{[C\textsubscript{d}](\%R\textsubscript{b}[,\%R\textsubscript{i}[,C\textsubscript{s}])} \\
    \bottomrule
  \end{tabularx}

  \[\textrm{Memory Address} = C_d + R_b + C_sR_i\]

  \noindent\begin{center}
    \begin{tabular}{cl}
      \toprule
      \multicolumn{2}{>{\sffamily\bfseries}c}{Suffixes} \\
      \midrule
      b & 8 bits \\
      w & 16 bits \\
      l & 32 bits \\
      q & 64 bits \\
      \bottomrule
    \end{tabular}
    \hspace{1em}
    \begin{tabular}{cl}
      \toprule
      \multicolumn{2}{>{\sffamily\bfseries}c}{Condition Flags} \\
      \midrule
      ZF & Zero \\
      SF & Sign (set on negative) \\ 
      CF & Carry \\
      OF & Overflow \\
      \bottomrule
    \end{tabular}
  \end{center}

  \section{Registers}

  \begin{tabularx}{\colwidth}{>{\ttfamily}c>{\ttfamily}c>{\ttfamily}c>{\ttfamily}cX}
    \toprule
    \multicolumn{5}{>{\sffamily\bfseries}c}{Standard} \\
    \midrule
    rax & eax & ax & al & Accumulator \\
    rbx & ebx & bx & bl & DS data pointer \\
    rcx & ecx & cx & cl & Counter \\
    rdx & edx & dx & dl & I/O pointer \\
    rsi & esi & si & sil & Source pointer \\
    rdi & edi & di & dil & Dest. pointer \\
    \midrule
    \multicolumn{5}{>{\sffamily\bfseries}c}{Stack} \\
    \midrule
    rsp & esp & sp & spl & Stack pointer \\
    rbp & ebp & bp & bpl & Base pointer \\
    \midrule
    \multicolumn{5}{>{\sffamily\bfseries}c}{64-bit Mode Only} \\
    \midrule
    r8 & r8d & r8w & r8b & \multicolumn{1}{c}{\textendash} \\
    r9 & r9d & r9w & r9b & \multicolumn{1}{c}{\textendash} \\
    r10 & r10d & r10w & r10b & \multicolumn{1}{c}{\textendash} \\
    r11 & r11d & r11w & r11b & \multicolumn{1}{c}{\textendash} \\
    r12 & r12d & r12w & r12b & \multicolumn{1}{c}{\textendash} \\
    r13 & r13d & r13w & r13b & \multicolumn{1}{c}{\textendash} \\
    r14 & r14d & r14w & r14b & \multicolumn{1}{c}{\textendash} \\
    r15 & r15d & r15w & r15b & \multicolumn{1}{c}{\textendash} \\
    \bottomrule
  \end{tabularx}

\end{multicols}

\end{document}