Write instructions and addressing modes sections

main.tex

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+\documentclass[a4paper,twocolumn]{article}
+
+\usepackage{cuted}
+\usepackage[margin=2cm]{geometry}
+\usepackage{mathtools}
+\usepackage{sectsty}
+\usepackage{tabularx}
+
+\pagenumbering{gobble}
+\setcounter{secnumdepth}{0}
+
+\allsectionsfont{\sffamily}
+
+\begin{document}
+
+\begin{strip}
+  \centering \LARGE \bfseries AMD64 Cheatsheet
+  \vspace{1em}
+\end{strip}
+
+\newlength{\colwidth}
+\setlength{\colwidth}{\linewidth}
+\addtolength{\colwidth}{-0.5\columnsep}
+
+\section{Addressing Modes}
+
+\begin{tabularx}{\colwidth}{|l|X|}
+  \hline
+  Immediate & \texttt{\$C} \\ \hline
+  Register & \texttt{\%R} \\ \hline
+  Memory & \texttt{[C\textsubscript{d}](\%R\textsubscript{b}[,\%R\textsubscript{i}[,C\textsubscript{s}])} \\ \hline
+\end{tabularx}
+
+\vspace{0.5em}
+
+\[\mathrm{address} = C_d + R_b + C_sR_i\]
+
+\section{Instructions}
+
+\begin{tabularx}{\colwidth}{|>{\ttfamily}l|>{$}X<{$}|}
+  \hline
+  add \ S,D & D \leftarrow S + D \\ \hline
+  sub \ S,D & D \leftarrow D - S \\ \hline
+  neg \ D & D \leftarrow -D \\ \hline
+  inc \ D & D \leftarrow D + 1 \\ \hline
+  dec \ D & D \leftarrow D - 1 \\ \hline
+  imul S,D & D \leftarrow S \times D \\ \hline
+  idiv S & \mathtt{rax} \leftarrow \lfloor\mathtt{rax} \div S\rfloor \\
+  & \mathtt{rdx} \leftarrow \mathtt{rax}\mod{S} \\ \hline
+  \hline
+  and S,D & D \leftarrow S \mathbin{\&} D \\ \hline
+  or \ S,D & D \leftarrow S \mathbin{|} D \\ \hline
+  xor S,D & D \leftarrow S \wedge D \\ \hline 
+  not D & D \leftarrow \mathord{\sim} D \\ \hline
+  sal n,D & D \leftarrow D \ll n \\ \hline
+  shr n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(logical)} \\ \hline
+  sar n,D & D \leftarrow D \gg n \hspace{1em} \textrm{(arithmetic)} \\ \hline
+  \hline
+  lea S,D & D \leftarrow \mathrm{addressof}(S) \\ \hline
+  mov S,D & D \leftarrow S \\ \hline
+  \hline
+  cmp \ A,B & B - A \hspace{1em} \textrm{(setting cond. flags)} \\ \hline
+  test A,B & A \mathbin{\&} B \hspace{1em} \textrm{(setting cond. flags)} \\ \hline
+  \hline
+  jmp l & \textrm{jump unconditionally} \\ \hline
+  je \ l & \textrm{jump if equal} \\ \hline
+  jne l & \textrm{jump if not equal} \\ \hline
+  js \ l & \textrm{jump if negative} \\ \hline
+  jns l & \textrm{jump if non-negative} \\ \hline
+  jg \ l & \textrm{jump if greater} \\ \hline
+  jge l & \textrm{jump if greater or equal} \\ \hline
+  jl \ l & \textrm{jump if lesser} \\ \hline
+  jle l & \textrm{jump if lesser or equal} \\ \hline
+  ja \ l & \textrm{jump if above} \\ \hline
+  jae l & \textrm{jump if above or equal} \\ \hline
+  jb \ l & \textrm{jump if below} \\ \hline
+  jbe l & \textrm{jump if below or equal} \\ \hline
+  \hline
+  push S & \mathtt{rsp} \leftarrow \mathtt{rsp} - \mathrm{sizeof}(S) \\
+  & \mathrm{at}(\mathtt{rsp}) \leftarrow S \\ \hline
+  pop \ D & D \leftarrow \mathrm{at}(\mathtt{rsp}) \\
+  & \mathtt{rsp} \leftarrow \mathtt{rsp} + \mathrm{sizeof}(S) \\ \hline
+  callq l & \textrm{push instruction pointer then jump} \\ \hline
+  retq & \textrm{pop to instruction pointer} \\ \hline
+\end{tabularx}
+
+\vspace{0.5em}
+
+\noindent\begin{tabularx}{\colwidth}{|c|l|c|c|X|}
+  \multicolumn{2}{c}{\textbf{Suffixes}} & \multicolumn{1}{c}{} & \multicolumn{2}{c}{\textbf{Condition flags}} \\ \cline{1-2} \cline{4-5}
+  b & 8 bits & & ZF & Zero \\ \cline{1-2} \cline{4-5}
+  w & 16 bits & & SF & Sign (set on negative) \\ \cline{1-2} \cline{4-5}
+  l & 32 bits & & CF & Carry (unsigned overflow) \\ \cline{1-2} \cline{4-5}
+  q & 64 bits & & OF & Overflow  (signed overflow) \\ \cline{1-2} \cline{4-5}
+\end{tabularx}
+
+\end{document}